Asus TS100-E5/PI4 Manuel d'utilisateur télécharger pdf (Page 77)

ASUS TS100-E5/PI4 4-21

SouthBridgeConguration

SMBUS Controller [Enabled]

Allows you to enable or disable the SMBUS Controller.

Conguration options: [Enabled] [Disabled]

SLP_S4# Min. Assertion Width [1 to 2 seconds]

Allows you to select the SLP_S4# Min. Assertion Width.

Conguration options: [4 to 5 seconds] [3 to 4 seconds] [2 to 3 seconds]

[1 to 2 seconds]

DRAM RAS# to CAS# Delay [6 DRAM Clocks]

Controls the latency between the DDR SDRAM active command and the

read/write command.

Conguration options: [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks]

[6 DRAM Clocks]

DRAM RAS# Precharge [6 DRAM Clocks]

Controls the idle clocks after issuing a precharge command to the DDR

SDRAM.

Conguration options: [3 DRAM Clocks] [4 DRAM Clocks] [5 DRAM Clocks]

[6 DRAM Clocks]

DRAM RAS# Activate to Precharge Delay [15 DRAM Clocks]

Conguration options: [9 DRAM Clocks] [10 DRAM Clocks] ~ [15 DRAM

Clocks]

Initiate Graphic Adapter [PEG/PCI]

Allows you to select the graphics controller as the primary boot device.

Conguration options: [PCI/PEG] [PEG/PCI]

PEGPortConguration

PEG Port [Auto]

Conguration options: [Auto] [Disabled]

SouthBridgechipsetConguration

SMBUSController  [Enabled]

SLP_S4#Min.AssertionWidth[1to2seconds]

BIOS SETUP UTILITY

Advanced

Options

Enabled

Disabled

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Asus TS100-E5/PI4 Manuel d'utilisateur Page 77