Asus P2B98-XV Manuel d'utilisateur Page 42

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42 ASUS P2B98-XV User’s Manual
IV. BIOS SOFTWARE
IV. BIOS
Chipset Features
Chipset Features Setup
The “Chipset Features Setup” option controls the configuration of the board’s chipset.
Control keys for this screen are the same as for the previous screen.
NOTE: SETUP Defaults are noted in parenthesis next to each function heading.
Details of Chipset Features Setup
SDRAM Configuration (By SPD)
This sets the optimal timings for items 2-5. Leave on default setting.
SDRAM CAS Latency (2T)
This controls the latency between SDRAM read command and the time that the data
actually becomes available. Leave on default setting.
SDRAM RAS to CAS Delay (3T)
This controls the latency between SDRAM active command and the read/write com-
mand. Leave on default setting.
SDRAM RAS Precharge Time (2T)
This controls the idle clocks after issuing a precharge command to SDRAM. Leave
on default setting.
DRAM Idle Timer (0T)
This controls the idle clocks before closing an opened SDRAM page. Leave on
default setting.
SDRAM MA Wait State (Normal)
This controls the leadoff clocks for CPU read cycles. Leave on default setting.
Snoop Ahead (Enabled)
Enabled will allow PCI streaming. Leave on default setting.
Host Bus Fast Data Ready (Enabled)
Leave on default setting.
16-bit I/O Recovery Time (1 BUSCLK) / 8-bit I/O Recovery Time (1 BUSCLK)
Timing for 16-bit and 8-bit ISA cards, respectively. Leave on default setting.
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